An Image Acquisition System Based on State Machine and Sampling ADCs

Abstract

The present work reports on the development of a digital system for image acquisition which is able to process two electric signals of amplitude varying between 0 and 10 V. The system correlates both signals in a two-dimensional (2-D) histogram. and coordinates for every event are obtained from the amplitudes of two coincident signals. The hardware consists of two analog-to-digital converters (ADCs), two complex programmable logic devices (CPLDs), and one 2 MB static random access memory (SRAM), implemented in a card that is plugged into personal computers. The data acquisition rate may be as high as 1.0 106 events per second, and does not depend on the PC processor. The software code has been written in the Delphi environment using Assembly routines for the I/O bus operations. Image sizes may be chosen from 128 128 up to 1024 1024 pixels and may be viewed in color scale, with two or three-dimen-sional graphics. Images are shown to illustrate the applicability to two-dimensional position sensitive X-ray detectors.