Conference · 2005

Test Station for the CARIOCA FE-chip of the LHCb Muon Detector

I. Bediaga, G. Cernichiaro, Luciano Manhães de Andrade Filho, A.A. Machado, J. Magnin, F. Marujo, J. Miranda, Rafael A. Nóbrega, E. Polycarpo, A. Reis, B. Schmidt

11th Workshop on Electronics for LHC and Future Experiments

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Abstract

This document describes the hardware and software of a Front-End Electronics Test Station developed to test and characterize the Front-End ASIC used in the LHCb Muon chambers. This ASIC is an 8-channel device that integrates amplification, shaping, discrimination, and baseline restoration, processing readout signals generated by Multi-Wire Proportional and GEM chambers operating in high-radiation environments. The design is predominantly analog. Approximately 25,000 chips are expected to be produced during the engineering and production phases, all requiring individual testing prior to final assembly on printed circuit boards. The proposed test system includes features such as variable and bipolar charge injection, custom readout, rate and timing measurement circuitry, power consumption monitoring, as well as data analysis and statistical tools. The system is controlled through a LabVIEW-based interface. Results from approximately 3,000 ASICs tested during the engineering run are presented, demonstrating the effectiveness of the test platform.