Simulation of the Upgraded Digital Signal Processing Firmware Using High-Level Synthesis on the Real-Time Trigger Path of the ATLAS Liquid Argon Calorimeters
Abstract
Precision and speed in instrumentation systems are essential in high-energy physics experiments to study fundamental particles. The Large Hadron Collider (LHC) at CERN relies on advanced systems like the ATLAS detector. The ATLAS Liquid Argon Calorimeter (LAr) has undergone upgrades to enhance its data processing capabilities, including the introduction of LATOME boards for back-end signal processing in Run 3. This paper focuses on the functional simulation steps used to verify the latest firmware upgrades for the LATOME boards, which incorporate High-Level Synthesis (HLS) components. A multi-layered simulation approach is presented to ensure the reliability and performance of the new firmware. The validation process includes core functionality tests, integration with serializers and deserializers, and full system-level simulations.